This invention relates to printed circuit boards loaded with electronic circuits in a data processing system such as a computer, and more particularly to such a printed circuit board which is capable of being inserted in and withdrawn from a common input/output bus line (abbreviated hereinafter as an I/O bus line) on on-line status. The term "on-line status" is used to denote that status in which other unit or units connected with the I/O bus line are making or ready to make exchange of information. Therefore, the power supply line energizing the units connected to the bus line is also alive.
A great progress is now made in the functions of a data processing system such as a computer. Along with this great progress in the functions of the data processing system, there is a growing tendency toward packaging an electronic circuit into an integrated form such as IC or LSI. Also, with the development of the packaging technique, there is an increasing tendency toward employment of electronic circuit packages in order to deal with local failure of the data processing system or partial alteration of the function of the data processing system. According to a common practice, the functions of the data processing system are divided into a plurality of elementary functions or parts, and each individual elementary function or part of the functions is packaged on a single board so that, in the event of failure of the electronic circuit carried by one of the boards or when alteration of part of the functions is required, this faulty board can be replaced by a new one having the same part of the functions or by a new one having the altered part of the functions. During the replacement of the faulty board by the new one, undesirable system-down of the entire data processing system must be avoided as much as possible. Any appreciable problem would not arise when this replacement can be carried out within a very short period of time. However, in view of the scale and speed of data processing in the data processing system, the concept of "short time" according to the human consideration is in many time too long to be basically allowable for the data processing system itself. The term "board" may have various definitions depending upon the service, but it is defined herein as a printed circuit board on the premise that an electronic circuit is printed on the board. A technique which permits withdrawl of such a printed circuit board on on-line status is disclosed in Japanese Patent Application No. 32,409/75 filed Mar. 19, 1975 in the Japanese Patent Office by the common assignee of the present application and laid open Sept. 25, 1976 as Kokai (Laid-Open) No. 108,520/76. Further, U.S. patent application Ser. No. 760,523 corresponding to this Japanese patent application No. 32,409/75 was filed on Jan. 19, 1977 by the inventors, K. Ohnuma et al, of the Japanese application No. 32,409/75 and is now U.S. Pat. No. 4,079,440, issued Mar. 14, 1978. The printed circuit board or plug-in package loaded with an electronic circuit and disclosed in this Japanese Patent Application Kokai (Laid-Open) No. 108,520/76 and corresponding U.S. patent application Ser. No. 760,523, is characterized in that the printed circuit board comprises at least two connector plugs for power supply. The connector plugs are arranged such that the outer end of one of them is more projected outwardly from the board than that of the other and that the two connector plugs are connected to each other through an impedance element. The other connector plug is connected to the electronic circuit loaded in the circuit board through an inductance element so as to supply electric power thereto. The circuit board further comprises a grounding terminal connected to a ground line of the electronic circuit and a locking terminal connected by a locking line for a signal from a signal stage of the electronic circuit, so that the grounding terminal and the locking terminal are adapted to be electrically connected to the ground during the insertion or withdrawal of the printed circuit board.
The disclosed printed circuit board (abbreviated hereinafter as a PCB) having such a structure can be inserted in and withdrawn from a common I/O bus line on on-line status and has thus obviated the defect of creating an electrical disturbance in the bus line during the insertion and withdrawal.
However, the disclosed PCB having such connector plugs permitting the insertion and withdrawal on on-line status is still quite insufficient to be put into practical use. This is because the insertion or withdrawal of the PCB in the stage of exchange of data between the computer and the input/output unit (abbreviated hereinafter as an I/O unit) associated with the PCB in question will destory the data processing operation since the PCB is inserted or withdrawn in the course of the data processing operation. With the disclosed PCB, it is impossible to obviate such a drawback.
In order to obviate such a drawback, the PCB must be inserted or withdrawn on on-line status at the timing at which this specific PCB is not participating in the exchange of data between the associated I/O unit and the computer through the bus line. That is, a suitable solution must be found to select the proper timing. For example, a state for artificially inhibiting the data exchange between the computer and the associated I/O unit through the PCB must be established, or the absence of the data exchange between the computer and the associated I/O unit through the PCB must be exactly detected for the successful insertion or withdrawal of the PCB on on-line status at the exact timing. However, it is impossible as a matter of fact to exactly detect the above timing for the successful insertion or withdrawal of the PCB on on-line status. This is because the data transfer speed of the computer is too high to be compared with the manipulating speed of the operator. Therefore, a special method has been adopted hitherto. According to this method, the operator makes necessary preparation on the program before the insertion or withdrawal of the PCB on on-line status thereby equivalently disconnecting the associated I/O unit from the bus line, that is, preventing, on the program, the central processor unit (abbreviated hereinafter as a CPU) from making data exchange with the associated I/O unit connected with the bus line, so that the data exchange between the computer and the specific I/O unit can be artificially inhibited. However, this method is defective in that the operator may key in an erroneous number instead of the correct number of the specific I/O unit, resulting in the danger of giving rise to objectionable system-down of the computer. Further, much more information must be keyed in by the operator for the insertion and withdrawal of a plurality of PCB's each controlling an associated I/O unit. Thus, the prior art method is also defective in that the necessity for the keying-in of such excessive information results in a reduced efficiency and an increase in the possibility of keying-in of an erroneous number.